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1 : /* 2 : * Copyright 2017 Advanced Micro Devices, Inc. 3 : * 4 : * Permission is hereby granted, free of charge, to any person obtaining a 5 : * copy of this software and associated documentation files (the "Software"), 6 : * to deal in the Software without restriction, including without limitation 7 : * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 : * and/or sell copies of the Software, and to permit persons to whom the 9 : * Software is furnished to do so, subject to the following conditions: 10 : * 11 : * The above copyright notice and this permission notice shall be included in 12 : * all copies or substantial portions of the Software. 13 : * 14 : * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 : * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 : * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 : * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 : * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 : * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 : * OTHER DEALINGS IN THE SOFTWARE. 21 : * 22 : */ 23 : 24 : #include "amdgpu.h" 25 : #include "amdgpu_vf_error.h" 26 : #include "mxgpu_ai.h" 27 : 28 0 : void amdgpu_vf_error_put(struct amdgpu_device *adev, 29 : uint16_t sub_error_code, 30 : uint16_t error_flags, 31 : uint64_t error_data) 32 : { 33 : int index; 34 : uint16_t error_code; 35 : 36 0 : if (!amdgpu_sriov_vf(adev)) 37 : return; 38 : 39 0 : error_code = AMDGIM_ERROR_CODE(AMDGIM_ERROR_CATEGORY_VF, sub_error_code); 40 : 41 0 : mutex_lock(&adev->virt.vf_errors.lock); 42 0 : index = adev->virt.vf_errors.write_count % AMDGPU_VF_ERROR_ENTRY_SIZE; 43 0 : adev->virt.vf_errors.code [index] = error_code; 44 0 : adev->virt.vf_errors.flags [index] = error_flags; 45 0 : adev->virt.vf_errors.data [index] = error_data; 46 0 : adev->virt.vf_errors.write_count ++; 47 0 : mutex_unlock(&adev->virt.vf_errors.lock); 48 : } 49 : 50 : 51 0 : void amdgpu_vf_error_trans_all(struct amdgpu_device *adev) 52 : { 53 : /* u32 pf2vf_flags = 0; */ 54 : u32 data1, data2, data3; 55 : int index; 56 : 57 0 : if ((NULL == adev) || (!amdgpu_sriov_vf(adev)) || 58 0 : (!adev->virt.ops) || (!adev->virt.ops->trans_msg)) { 59 : return; 60 : } 61 : /* 62 : TODO: Enable these code when pv2vf_info is merged 63 : AMDGPU_FW_VRAM_PF2VF_READ (adev, feature_flags, &pf2vf_flags); 64 : if (!(pf2vf_flags & AMDGIM_FEATURE_ERROR_LOG_COLLECT)) { 65 : return; 66 : } 67 : */ 68 : 69 0 : mutex_lock(&adev->virt.vf_errors.lock); 70 : /* The errors are overlay of array, correct read_count as full. */ 71 0 : if (adev->virt.vf_errors.write_count - adev->virt.vf_errors.read_count > AMDGPU_VF_ERROR_ENTRY_SIZE) { 72 0 : adev->virt.vf_errors.read_count = adev->virt.vf_errors.write_count - AMDGPU_VF_ERROR_ENTRY_SIZE; 73 : } 74 : 75 0 : while (adev->virt.vf_errors.read_count < adev->virt.vf_errors.write_count) { 76 0 : index =adev->virt.vf_errors.read_count % AMDGPU_VF_ERROR_ENTRY_SIZE; 77 0 : data1 = AMDGIM_ERROR_CODE_FLAGS_TO_MAILBOX(adev->virt.vf_errors.code[index], 78 : adev->virt.vf_errors.flags[index]); 79 0 : data2 = adev->virt.vf_errors.data[index] & 0xFFFFFFFF; 80 0 : data3 = (adev->virt.vf_errors.data[index] >> 32) & 0xFFFFFFFF; 81 : 82 0 : adev->virt.ops->trans_msg(adev, IDH_LOG_VF_ERROR, data1, data2, data3); 83 0 : adev->virt.vf_errors.read_count ++; 84 : } 85 0 : mutex_unlock(&adev->virt.vf_errors.lock); 86 : }