LCOV - code coverage report
Current view: top level - drivers/gpu/drm/amd/amdgpu - gfx_v8_0.c (source / functions) Hit Total Coverage
Test: coverage.info Lines: 0 2856 0.0 %
Date: 2022-12-09 01:23:36 Functions: 0 141 0.0 %

Function Name Sort by function name Hit count Sort by hit count
cz_enable_cp_power_gating 0
cz_enable_gfx_cg_power_gating 0
cz_enable_gfx_pipeline_power_gating 0
cz_enable_sck_slow_down_on_power_down 0
cz_enable_sck_slow_down_on_power_up 0
cz_update_gfx_cg_power_gating 0
gfx_v8_0_check_soft_reset 0
gfx_v8_0_compute_ring_init 0
gfx_v8_0_constants_init 0
gfx_v8_0_cp_compute_enable 0
gfx_v8_0_cp_ecc_error_irq 0
gfx_v8_0_cp_gfx_enable 0
gfx_v8_0_cp_gfx_resume 0
gfx_v8_0_cp_gfx_start 0
gfx_v8_0_cp_jump_table_num 0
gfx_v8_0_cp_resume 0
gfx_v8_0_cp_test_all_rings 0
gfx_v8_0_deactivate_hqd 0
gfx_v8_0_do_edc_gpr_workarounds 0
gfx_v8_0_early_init 0
gfx_v8_0_emit_mem_sync 0
gfx_v8_0_emit_mem_sync_compute 0
gfx_v8_0_emit_wave_limit 0
gfx_v8_0_emit_wave_limit_cs 0
gfx_v8_0_enable_gfx_dynamic_mg_power_gating 0
gfx_v8_0_enable_gfx_static_mg_power_gating 0
gfx_v8_0_enable_gui_idle_interrupt 0
gfx_v8_0_enable_save_restore_machine 0
gfx_v8_0_eop_irq 0
gfx_v8_0_fault.isra.11 0
gfx_v8_0_free_microcode 0
gfx_v8_0_get_clockgating_state 0
gfx_v8_0_get_csb_buffer 0
gfx_v8_0_get_csb_size 0
gfx_v8_0_get_cu_active_bitmap 0
gfx_v8_0_get_cu_info 0
gfx_v8_0_get_gpu_clock_counter 0
gfx_v8_0_get_rb_active_bitmap 0
gfx_v8_0_gpu_early_init 0
gfx_v8_0_hw_fini 0
gfx_v8_0_hw_init 0
gfx_v8_0_init_compute_vmid 0
gfx_v8_0_init_csb 0
gfx_v8_0_init_gds_vmid 0
gfx_v8_0_init_golden_registers 0
gfx_v8_0_init_microcode 0
gfx_v8_0_init_pg 0
gfx_v8_0_init_power_gating 0
gfx_v8_0_init_save_restore_list 0
gfx_v8_0_is_idle 0
gfx_v8_0_is_rlc_enabled 0
gfx_v8_0_kcq_disable 0
gfx_v8_0_kcq_init_queue 0
gfx_v8_0_kcq_resume 0
gfx_v8_0_kiq_init_queue 0
gfx_v8_0_kiq_kcq_enable 0
gfx_v8_0_kiq_resume 0
gfx_v8_0_kiq_setting 0
gfx_v8_0_late_init 0
gfx_v8_0_mec_init 0
gfx_v8_0_mqd_commit 0
gfx_v8_0_mqd_init 0
gfx_v8_0_parse_ind_reg_list 0
gfx_v8_0_parse_sq_irq 0
gfx_v8_0_polaris_update_gfx_clock_gating 0
gfx_v8_0_post_soft_reset 0
gfx_v8_0_pre_soft_reset 0
gfx_v8_0_priv_inst_irq 0
gfx_v8_0_priv_reg_irq 0
gfx_v8_0_raster_config.isra.10 0
gfx_v8_0_read_wave_data 0
gfx_v8_0_read_wave_sgprs 0
gfx_v8_0_resume 0
gfx_v8_0_ring_emit_ce_meta 0
gfx_v8_0_ring_emit_de_meta 0
gfx_v8_0_ring_emit_fence_compute 0
gfx_v8_0_ring_emit_fence_gfx 0
gfx_v8_0_ring_emit_fence_kiq 0
gfx_v8_0_ring_emit_gds_switch 0
gfx_v8_0_ring_emit_hdp_flush 0
gfx_v8_0_ring_emit_ib_compute 0
gfx_v8_0_ring_emit_ib_gfx 0
gfx_v8_0_ring_emit_init_cond_exec 0
gfx_v8_0_ring_emit_patch_cond_exec 0
gfx_v8_0_ring_emit_pipeline_sync 0
gfx_v8_0_ring_emit_rreg 0
gfx_v8_0_ring_emit_vgt_flush 0
gfx_v8_0_ring_emit_vm_flush 0
gfx_v8_0_ring_emit_wreg 0
gfx_v8_0_ring_get_rptr 0
gfx_v8_0_ring_get_wptr_compute 0
gfx_v8_0_ring_get_wptr_gfx 0
gfx_v8_0_ring_set_wptr_compute 0
gfx_v8_0_ring_set_wptr_gfx 0
gfx_v8_0_ring_soft_recovery 0
gfx_v8_0_ring_test_ib 0
gfx_v8_0_ring_test_ring 0
gfx_v8_0_rlc_init 0
gfx_v8_0_rlc_reset 0
gfx_v8_0_rlc_resume 0
gfx_v8_0_rlc_start 0
gfx_v8_0_rlc_stop 0
gfx_v8_0_select_me_pipe_q 0
gfx_v8_0_select_se_sh 0
gfx_v8_0_send_serdes_cmd 0
gfx_v8_0_set_clockgating_state 0
gfx_v8_0_set_compute_eop_interrupt_state 0
gfx_v8_0_set_cp_ecc_int_state 0
gfx_v8_0_set_cpg_door_bell.isra.8 0
gfx_v8_0_set_eop_interrupt_state 0
gfx_v8_0_set_gds_init 0
gfx_v8_0_set_gfx_eop_interrupt_state 0
gfx_v8_0_set_mec_doorbell_range 0
gfx_v8_0_set_powergating_state 0
gfx_v8_0_set_priv_inst_fault_state 0
gfx_v8_0_set_priv_reg_fault_state 0
gfx_v8_0_set_safe_mode 0
gfx_v8_0_set_sq_int_state 0
gfx_v8_0_setup_rb 0
gfx_v8_0_soft_reset 0
gfx_v8_0_sq_irq 0
gfx_v8_0_sq_irq_work_func 0
gfx_v8_0_suspend 0
gfx_v8_0_sw_fini 0
gfx_v8_0_sw_init 0
gfx_v8_0_tiling_mode_table_init 0
gfx_v8_0_tonga_update_gfx_clock_gating 0
gfx_v8_0_unset_safe_mode 0
gfx_v8_0_update_coarse_grain_clock_gating 0
gfx_v8_0_update_gfx_clock_gating 0
gfx_v8_0_update_medium_grain_clock_gating 0
gfx_v8_0_update_spm_vmid 0
gfx_v8_0_wait_for_idle 0
gfx_v8_0_wait_for_rlc_idle 0
gfx_v8_0_wait_for_rlc_serdes 0
gfx_v8_0_write_harvested_raster_configs 0
gfx_v8_ring_emit_cntxcntl 0
gfx_v8_ring_emit_sb 0
polaris11_enable_gfx_quick_mg_power_gating 0
wave_read_ind 0
wave_read_regs 0

Generated by: LCOV version 1.14