Line data Source code
1 : /*
2 : * Copyright 2021 Advanced Micro Devices, Inc.
3 : *
4 : * Permission is hereby granted, free of charge, to any person obtaining a
5 : * copy of this software and associated documentation files (the "Software"),
6 : * to deal in the Software without restriction, including without limitation
7 : * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 : * and/or sell copies of the Software, and to permit persons to whom the
9 : * Software is furnished to do so, subject to the following conditions:
10 : *
11 : * The above copyright notice and this permission notice shall be included in
12 : * all copies or substantial portions of the Software.
13 : *
14 : * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 : * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 : * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 : * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 : * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 : * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 : * OTHER DEALINGS IN THE SOFTWARE.
21 : *
22 : * Authors: AMD
23 : *
24 : */
25 :
26 : #include "dm_services.h"
27 : #include "core_types.h"
28 : #include "reg_helper.h"
29 : #include "dcn32_dpp.h"
30 : #include "basics/conversion.h"
31 : #include "dcn30/dcn30_cm_common.h"
32 :
33 : /* Compute the maximum number of lines that we can fit in the line buffer */
34 0 : void dscl32_calc_lb_num_partitions(
35 : const struct scaler_data *scl_data,
36 : enum lb_memory_config lb_config,
37 : int *num_part_y,
38 : int *num_part_c)
39 : {
40 : int memory_line_size_y, memory_line_size_c, memory_line_size_a,
41 : lb_memory_size, lb_memory_size_c, lb_memory_size_a, num_partitions_a;
42 :
43 0 : int line_size = scl_data->viewport.width < scl_data->recout.width ?
44 0 : scl_data->viewport.width : scl_data->recout.width;
45 0 : int line_size_c = scl_data->viewport_c.width < scl_data->recout.width ?
46 0 : scl_data->viewport_c.width : scl_data->recout.width;
47 :
48 0 : if (line_size == 0)
49 0 : line_size = 1;
50 :
51 0 : if (line_size_c == 0)
52 0 : line_size_c = 1;
53 :
54 0 : memory_line_size_y = (line_size + 5) / 6; /* +5 to ceil */
55 0 : memory_line_size_c = (line_size_c + 5) / 6; /* +5 to ceil */
56 0 : memory_line_size_a = (line_size + 5) / 6; /* +5 to ceil */
57 :
58 0 : if (lb_config == LB_MEMORY_CONFIG_1) {
59 : lb_memory_size = 970;
60 : lb_memory_size_c = 970;
61 : lb_memory_size_a = 970;
62 0 : } else if (lb_config == LB_MEMORY_CONFIG_2) {
63 : lb_memory_size = 1290;
64 : lb_memory_size_c = 1290;
65 : lb_memory_size_a = 1290;
66 0 : } else if (lb_config == LB_MEMORY_CONFIG_3) {
67 0 : if (scl_data->viewport.width == scl_data->h_active &&
68 0 : scl_data->viewport.height == scl_data->v_active) {
69 : /* 420 mode: luma using all 3 mem from Y, plus 3rd mem from Cr and Cb */
70 : /* use increased LB size for calculation only if Scaler not enabled */
71 : lb_memory_size = 970 + 1290 + 1170 + 1170 + 1170;
72 : lb_memory_size_c = 970 + 1290;
73 : lb_memory_size_a = 970 + 1290 + 1170;
74 : } else {
75 : /* 420 mode: luma using all 3 mem from Y, plus 3rd mem from Cr and Cb */
76 0 : lb_memory_size = 970 + 1290 + 484 + 484 + 484;
77 0 : lb_memory_size_c = 970 + 1290;
78 0 : lb_memory_size_a = 970 + 1290 + 484;
79 : }
80 : } else {
81 0 : if (scl_data->viewport.width == scl_data->h_active &&
82 0 : scl_data->viewport.height == scl_data->v_active) {
83 : /* use increased LB size for calculation only if Scaler not enabled */
84 : lb_memory_size = 970 + 1290 + 1170;
85 : lb_memory_size_c = 970 + 1290 + 1170;
86 : lb_memory_size_a = 970 + 1290 + 1170;
87 : } else {
88 0 : lb_memory_size = 970 + 1290 + 484;
89 0 : lb_memory_size_c = 970 + 1290 + 484;
90 0 : lb_memory_size_a = 970 + 1290 + 484;
91 : }
92 : }
93 0 : *num_part_y = lb_memory_size / memory_line_size_y;
94 0 : *num_part_c = lb_memory_size_c / memory_line_size_c;
95 0 : num_partitions_a = lb_memory_size_a / memory_line_size_a;
96 :
97 0 : if (scl_data->lb_params.alpha_en
98 0 : && (num_partitions_a < *num_part_y))
99 0 : *num_part_y = num_partitions_a;
100 :
101 0 : if (*num_part_y > 32)
102 0 : *num_part_y = 32;
103 0 : if (*num_part_c > 32)
104 0 : *num_part_c = 32;
105 0 : }
106 :
107 : static struct dpp_funcs dcn32_dpp_funcs = {
108 : .dpp_program_gamcor_lut = dpp3_program_gamcor_lut,
109 : .dpp_read_state = dpp30_read_state,
110 : .dpp_reset = dpp_reset,
111 : .dpp_set_scaler = dpp1_dscl_set_scaler_manual_scale,
112 : .dpp_get_optimal_number_of_taps = dpp3_get_optimal_number_of_taps,
113 : .dpp_set_gamut_remap = dpp3_cm_set_gamut_remap,
114 : .dpp_set_csc_adjustment = NULL,
115 : .dpp_set_csc_default = NULL,
116 : .dpp_program_regamma_pwl = NULL,
117 : .dpp_set_pre_degam = dpp3_set_pre_degam,
118 : .dpp_program_input_lut = NULL,
119 : .dpp_full_bypass = dpp1_full_bypass,
120 : .dpp_setup = dpp3_cnv_setup,
121 : .dpp_program_degamma_pwl = NULL,
122 : .dpp_program_cm_dealpha = dpp3_program_cm_dealpha,
123 : .dpp_program_cm_bias = dpp3_program_cm_bias,
124 :
125 : .dpp_program_blnd_lut = NULL, // BLNDGAM is removed completely in DCN3.2 DPP
126 : .dpp_program_shaper_lut = NULL, // CM SHAPER block is removed in DCN3.2 DPP, (it is in MPCC, programmable before or after BLND)
127 : .dpp_program_3dlut = NULL, // CM 3DLUT block is removed in DCN3.2 DPP, (it is in MPCC, programmable before or after BLND)
128 :
129 : .dpp_program_bias_and_scale = NULL,
130 : .dpp_cnv_set_alpha_keyer = dpp2_cnv_set_alpha_keyer,
131 : .set_cursor_attributes = dpp3_set_cursor_attributes,
132 : .set_cursor_position = dpp1_set_cursor_position,
133 : .set_optional_cursor_attributes = dpp1_cnv_set_optional_cursor_attributes,
134 : .dpp_dppclk_control = dpp1_dppclk_control,
135 : .dpp_set_hdr_multiplier = dpp3_set_hdr_multiplier,
136 : };
137 :
138 :
139 : static struct dpp_caps dcn32_dpp_cap = {
140 : .dscl_data_proc_format = DSCL_DATA_PRCESSING_FLOAT_FORMAT,
141 : .max_lb_partitions = 31,
142 : .dscl_calc_lb_num_partitions = dscl32_calc_lb_num_partitions,
143 : };
144 :
145 0 : bool dpp32_construct(
146 : struct dcn3_dpp *dpp,
147 : struct dc_context *ctx,
148 : uint32_t inst,
149 : const struct dcn3_dpp_registers *tf_regs,
150 : const struct dcn3_dpp_shift *tf_shift,
151 : const struct dcn3_dpp_mask *tf_mask)
152 : {
153 0 : dpp->base.ctx = ctx;
154 :
155 0 : dpp->base.inst = inst;
156 0 : dpp->base.funcs = &dcn32_dpp_funcs;
157 0 : dpp->base.caps = &dcn32_dpp_cap;
158 :
159 0 : dpp->tf_regs = tf_regs;
160 0 : dpp->tf_shift = tf_shift;
161 0 : dpp->tf_mask = tf_mask;
162 :
163 0 : return true;
164 : }
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