Line data Source code
1 : /* 2 : * Copyright 2012-15 Advanced Micro Devices, Inc. 3 : * 4 : * Permission is hereby granted, free of charge, to any person obtaining a 5 : * copy of this software and associated documentation files (the "Software"), 6 : * to deal in the Software without restriction, including without limitation 7 : * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 : * and/or sell copies of the Software, and to permit persons to whom the 9 : * Software is furnished to do so, subject to the following conditions: 10 : * 11 : * The above copyright notice and this permission notice shall be included in 12 : * all copies or substantial portions of the Software. 13 : * 14 : * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 : * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 : * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 : * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 : * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 : * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 : * OTHER DEALINGS IN THE SOFTWARE. 21 : * 22 : * Authors: AMD 23 : * 24 : */ 25 : 26 : #include "dm_services.h" 27 : 28 : /* 29 : * Pre-requisites: headers required by header of this unit 30 : */ 31 : #include "include/gpio_types.h" 32 : 33 : /* 34 : * Header of this unit 35 : */ 36 : 37 : #include "hw_translate.h" 38 : 39 : /* 40 : * Post-requisites: headers required by this unit 41 : */ 42 : 43 : #if defined(CONFIG_DRM_AMD_DC_SI) 44 : #include "dce60/hw_translate_dce60.h" 45 : #endif 46 : #include "dce80/hw_translate_dce80.h" 47 : #include "dce110/hw_translate_dce110.h" 48 : #include "dce120/hw_translate_dce120.h" 49 : #include "dcn10/hw_translate_dcn10.h" 50 : #include "dcn20/hw_translate_dcn20.h" 51 : #include "dcn21/hw_translate_dcn21.h" 52 : #include "dcn30/hw_translate_dcn30.h" 53 : #include "dcn315/hw_translate_dcn315.h" 54 : #include "dcn32/hw_translate_dcn32.h" 55 : 56 : /* 57 : * This unit 58 : */ 59 : 60 0 : bool dal_hw_translate_init( 61 : struct hw_translate *translate, 62 : enum dce_version dce_version, 63 : enum dce_environment dce_environment) 64 : { 65 0 : switch (dce_version) { 66 : #if defined(CONFIG_DRM_AMD_DC_SI) 67 : case DCE_VERSION_6_0: 68 : case DCE_VERSION_6_1: 69 : case DCE_VERSION_6_4: 70 : dal_hw_translate_dce60_init(translate); 71 : return true; 72 : #endif 73 : case DCE_VERSION_8_0: 74 : case DCE_VERSION_8_1: 75 : case DCE_VERSION_8_3: 76 0 : dal_hw_translate_dce80_init(translate); 77 0 : return true; 78 : case DCE_VERSION_10_0: 79 : case DCE_VERSION_11_0: 80 : case DCE_VERSION_11_2: 81 : case DCE_VERSION_11_22: 82 0 : dal_hw_translate_dce110_init(translate); 83 0 : return true; 84 : case DCE_VERSION_12_0: 85 : case DCE_VERSION_12_1: 86 0 : dal_hw_translate_dce120_init(translate); 87 0 : return true; 88 : case DCN_VERSION_1_0: 89 : case DCN_VERSION_1_01: 90 0 : dal_hw_translate_dcn10_init(translate); 91 0 : return true; 92 : case DCN_VERSION_2_0: 93 0 : dal_hw_translate_dcn20_init(translate); 94 0 : return true; 95 : case DCN_VERSION_2_01: 96 : case DCN_VERSION_2_1: 97 0 : dal_hw_translate_dcn21_init(translate); 98 0 : return true; 99 : case DCN_VERSION_3_0: 100 : case DCN_VERSION_3_01: 101 : case DCN_VERSION_3_02: 102 : case DCN_VERSION_3_03: 103 : case DCN_VERSION_3_1: 104 : case DCN_VERSION_3_14: 105 : case DCN_VERSION_3_16: 106 0 : dal_hw_translate_dcn30_init(translate); 107 0 : return true; 108 : case DCN_VERSION_3_15: 109 0 : dal_hw_translate_dcn315_init(translate); 110 0 : return true; 111 : case DCN_VERSION_3_2: 112 : case DCN_VERSION_3_21: 113 0 : dal_hw_translate_dcn32_init(translate); 114 0 : return true; 115 : default: 116 0 : BREAK_TO_DEBUGGER(); 117 0 : return false; 118 : } 119 : }