Line data    Source code

       1             : /*
       2             :  * Copyright 2022 Advanced Micro Devices, Inc.
       3             :  *
       4             :  * Permission is hereby granted, free of charge, to any person obtaining a
       5             :  * copy of this software and associated documentation files (the "Software"),
       6             :  * to deal in the Software without restriction, including without limitation
       7             :  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
       8             :  * and/or sell copies of the Software, and to permit persons to whom the
       9             :  * Software is furnished to do so, subject to the following conditions:
      10             :  *
      11             :  * The above copyright notice and this permission notice shall be included in
      12             :  * all copies or substantial portions of the Software.
      13             :  *
      14             :  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
      15             :  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
      16             :  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
      17             :  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
      18             :  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
      19             :  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
      20             :  * OTHER DEALINGS IN THE SOFTWARE.
      21             :  *
      22             :  * Authors: AMD
      23             :  *
      24             :  */
      25             : #include "link_hwss_dpia.h"
      26             : #include "core_types.h"
      27             : #include "link_hwss_dio.h"
      28             : #include "link_enc_cfg.h"
      29             : 
      30             : #define DC_LOGGER_INIT(logger)
      31             : 
      32           0 : static void update_dpia_stream_allocation_table(struct dc_link *link,
      33             :                 const struct link_resource *link_res,
      34             :                 const struct link_mst_stream_allocation_table *table)
      35             : {
      36           0 :         struct link_encoder *link_enc = link_enc_cfg_get_link_enc(link);
      37             :         static enum dc_status status;
      38           0 :         uint8_t mst_alloc_slots = 0, prev_mst_slots_in_use = 0xFF;
      39             :         int i;
      40             :         DC_LOGGER_INIT(link->ctx->logger);
      41             : 
      42           0 :         for (i = 0; i < table->stream_count; i++)
      43           0 :                 mst_alloc_slots += table->stream_allocations[i].slot_count;
      44             : 
      45           0 :         status = dc_process_dmub_set_mst_slots(link->dc, link->link_index,
      46             :                         mst_alloc_slots, &prev_mst_slots_in_use);
      47           0 :         ASSERT(status == DC_OK);
      48           0 :         DC_LOG_MST("dpia : status[%d]: alloc_slots[%d]: used_slots[%d]\n",
      49             :                         status, mst_alloc_slots, prev_mst_slots_in_use);
      50             : 
      51           0 :         ASSERT(link_enc);
      52           0 :         link_enc->funcs->update_mst_stream_allocation_table(link_enc, table);
      53           0 : }
      54             : 
      55             : static const struct link_hwss dpia_link_hwss = {
      56             :         .setup_stream_encoder = setup_dio_stream_encoder,
      57             :         .reset_stream_encoder = reset_dio_stream_encoder,
      58             :         .setup_stream_attribute = setup_dio_stream_attribute,
      59             :         .ext = {
      60             :                 .set_throttled_vcp_size = set_dio_throttled_vcp_size,
      61             :                 .enable_dp_link_output = enable_dio_dp_link_output,
      62             :                 .disable_dp_link_output = disable_dio_dp_link_output,
      63             :                 .set_dp_link_test_pattern = set_dio_dp_link_test_pattern,
      64             :                 .set_dp_lane_settings = set_dio_dp_lane_settings,
      65             :                 .update_stream_allocation_table = update_dpia_stream_allocation_table,
      66             :         },
      67             : };
      68             : 
      69           0 : bool can_use_dpia_link_hwss(const struct dc_link *link,
      70             :                 const struct link_resource *link_res)
      71             : {
      72           0 :         return link->is_dig_mapping_flexible &&
      73           0 :                         link->dc->res_pool->funcs->link_encs_assign;
      74             : }
      75             : 
      76           0 : const struct link_hwss *get_dpia_link_hwss(void)
      77             : {
      78           0 :         return &dpia_link_hwss;
      79             : }