Line data Source code
1 : // SPDX-License-Identifier: MIT
2 : /*
3 : * KUnit tests for dc_dmub_srv.c
4 : *
5 : * Copyright (C) 2022, Maíra Canal <mairacanal@riseup.net>
6 : */
7 :
8 : #include <kunit/test.h>
9 : #include "dc_dmub_srv.h"
10 :
11 : struct populate_subvp_cmd_drr_info_test_case {
12 : const char *desc;
13 : struct dc *dc;
14 : struct pipe_ctx *subvp_pipe;
15 : struct pipe_ctx *vblank_pipe;
16 : const u8 drr_in_use;
17 : const u8 drr_window_size_ms;
18 : const u16 min_vtotal_supported;
19 : const u16 max_vtotal_supported;
20 : const u8 use_ramping;
21 : };
22 :
23 : struct populate_subvp_cmd_drr_info_test_case populate_subvp_cmd_drr_info_cases[] = {
24 : {
25 : .desc = "Same Clock Frequency",
26 : .dc = &(struct dc) {
27 : .caps = {
28 : .subvp_prefetch_end_to_mall_start_us = 0,
29 : }
30 : },
31 : .subvp_pipe = &(struct pipe_ctx) {
32 : .stream = &(struct dc_stream_state) {
33 : .timing = {
34 : .h_total = 2784,
35 : .v_addressable = 1080,
36 : .pix_clk_100hz = 1855800,
37 : },
38 : .mall_stream_config = {
39 : .paired_stream = &(struct dc_stream_state) {
40 : .timing = {
41 : .h_total = 3600,
42 : .v_total = 1111,
43 : .v_addressable = 1080,
44 : .v_front_porch = 3,
45 : .pix_clk_100hz = 1855800,
46 : },
47 : },
48 : },
49 : },
50 : },
51 : .vblank_pipe = &(struct pipe_ctx) {
52 : .stream = &(struct dc_stream_state) {
53 : .timing = {
54 : .h_total = 2784,
55 : .v_total = 1111,
56 : .v_addressable = 1080,
57 : .pix_clk_100hz = 1855800,
58 : },
59 : },
60 : },
61 : .drr_in_use = true,
62 : .use_ramping = false,
63 : .drr_window_size_ms = 4,
64 : .min_vtotal_supported = 63709,
65 : .max_vtotal_supported = 363,
66 : },
67 : {
68 : .desc = "Same Clock Frequency with Prefetch End to Mall Start",
69 : .dc = &(struct dc) {
70 : .caps = {
71 : .subvp_prefetch_end_to_mall_start_us = 500,
72 : }
73 : },
74 : .subvp_pipe = &(struct pipe_ctx) {
75 : .stream = &(struct dc_stream_state) {
76 : .timing = {
77 : .h_total = 2784,
78 : .v_addressable = 1080,
79 : .pix_clk_100hz = 1855800,
80 : },
81 : .mall_stream_config = {
82 : .paired_stream = &(struct dc_stream_state) {
83 : .timing = {
84 : .h_total = 3600,
85 : .v_total = 1111,
86 : .v_addressable = 1080,
87 : .v_front_porch = 3,
88 : .pix_clk_100hz = 1855800,
89 : },
90 : },
91 : },
92 : },
93 : },
94 : .vblank_pipe = &(struct pipe_ctx) {
95 : .stream = &(struct dc_stream_state) {
96 : .timing = {
97 : .h_total = 2784,
98 : .v_total = 1111,
99 : .v_addressable = 1080,
100 : .pix_clk_100hz = 1855800,
101 : },
102 : },
103 : },
104 : .drr_in_use = true,
105 : .use_ramping = false,
106 : .drr_window_size_ms = 4,
107 : .min_vtotal_supported = 63709,
108 : .max_vtotal_supported = 346,
109 : },
110 : {
111 : .desc = "Same Clock Frequency Not Multiple of 2",
112 : .dc = &(struct dc) {
113 : .caps = {
114 : .subvp_prefetch_end_to_mall_start_us = 0,
115 : }
116 : },
117 : .subvp_pipe = &(struct pipe_ctx) {
118 : .stream = &(struct dc_stream_state) {
119 : .timing = {
120 : .h_total = 2784,
121 : .v_addressable = 1080,
122 : .pix_clk_100hz = 1866743,
123 : },
124 : .mall_stream_config = {
125 : .paired_stream = &(struct dc_stream_state) {
126 : .timing = {
127 : .h_total = 3600,
128 : .v_total = 2400,
129 : .v_addressable = 2360,
130 : .v_front_porch = 4,
131 : .pix_clk_100hz = 1866743,
132 : },
133 : },
134 : },
135 : },
136 : },
137 : .vblank_pipe = &(struct pipe_ctx) {
138 : .stream = &(struct dc_stream_state) {
139 : .timing = {
140 : .h_total = 3600,
141 : .v_total = 2400,
142 : .v_addressable = 2360,
143 : .pix_clk_100hz = 1866743,
144 : },
145 : },
146 : },
147 : .drr_in_use = true,
148 : .use_ramping = false,
149 : .drr_window_size_ms = 4,
150 : .min_vtotal_supported = 1387,
151 : .max_vtotal_supported = 399,
152 : },
153 : {
154 : .desc = "Different Clock Frequency for smaller h_total and v_total",
155 : .dc = &(struct dc) {
156 : .caps = {
157 : .subvp_prefetch_end_to_mall_start_us = 300,
158 : }
159 : },
160 : .subvp_pipe = &(struct pipe_ctx) {
161 : .stream = &(struct dc_stream_state) {
162 : .timing = {
163 : .h_total = 1280,
164 : .v_addressable = 600,
165 : .pix_clk_100hz = 1855800,
166 : },
167 : .mall_stream_config = {
168 : .paired_stream = &(struct dc_stream_state) {
169 : .timing = {
170 : .h_total = 1280,
171 : .v_total = 720,
172 : .v_addressable = 600,
173 : .v_front_porch = 4,
174 : .pix_clk_100hz = 1866743,
175 : },
176 : },
177 : },
178 : },
179 : },
180 : .vblank_pipe = &(struct pipe_ctx) {
181 : .stream = &(struct dc_stream_state) {
182 : .timing = {
183 : .h_total = 1280,
184 : .v_total = 720,
185 : .v_addressable = 600,
186 : .pix_clk_100hz = 2100800,
187 : },
188 : },
189 : },
190 : .drr_in_use = true,
191 : .use_ramping = false,
192 : .drr_window_size_ms = 4,
193 : .min_vtotal_supported = 1477,
194 : .max_vtotal_supported = 212,
195 : },
196 : {
197 : .desc = "Different Clock Frequency for approximately 1920x1080",
198 : .dc = &(struct dc) {
199 : .caps = {
200 : .subvp_prefetch_end_to_mall_start_us = 0,
201 : }
202 : },
203 : .subvp_pipe = &(struct pipe_ctx) {
204 : .stream = &(struct dc_stream_state) {
205 : .timing = {
206 : .h_total = 1920,
207 : .v_addressable = 1000,
208 : .pix_clk_100hz = 1855800,
209 : },
210 : .mall_stream_config = {
211 : .paired_stream = &(struct dc_stream_state) {
212 : .timing = {
213 : .h_total = 1911,
214 : .v_total = 1080,
215 : .v_addressable = 1000,
216 : .v_front_porch = 7,
217 : .pix_clk_100hz = 1866743,
218 : },
219 : },
220 : },
221 : },
222 : },
223 : .vblank_pipe = &(struct pipe_ctx) {
224 : .stream = &(struct dc_stream_state) {
225 : .timing = {
226 : .h_total = 1280,
227 : .v_total = 720,
228 : .v_addressable = 600,
229 : .pix_clk_100hz = 2100800,
230 : },
231 : },
232 : },
233 : .drr_in_use = true,
234 : .use_ramping = false,
235 : .drr_window_size_ms = 4,
236 : .min_vtotal_supported = 2482,
237 : .max_vtotal_supported = 247,
238 : },
239 : };
240 :
241 5 : static void populate_subvp_cmd_drr_info_test_to_desc(struct
242 : populate_subvp_cmd_drr_info_test_case * t, char *desc)
243 : {
244 5 : strcpy(desc, t->desc);
245 5 : }
246 :
247 6 : KUNIT_ARRAY_PARAM(populate_subvp_cmd_drr_info, populate_subvp_cmd_drr_info_cases,
248 : populate_subvp_cmd_drr_info_test_to_desc);
249 :
250 5 : static void populate_subvp_cmd_drr_info_test(struct kunit *test)
251 : {
252 5 : const struct populate_subvp_cmd_drr_info_test_case *test_param =
253 : test->param_value;
254 : struct dmub_cmd_fw_assisted_mclk_switch_pipe_data_v2 *pipe_data;
255 :
256 5 : pipe_data = kunit_kzalloc(test,
257 : sizeof(struct dmub_cmd_fw_assisted_mclk_switch_pipe_data_v2),
258 : GFP_KERNEL);
259 :
260 5 : populate_subvp_cmd_drr_info(test_param->dc, test_param->subvp_pipe,
261 : test_param->vblank_pipe, pipe_data);
262 :
263 5 : KUNIT_EXPECT_EQ(test, test_param->drr_in_use,
264 : pipe_data->pipe_config.vblank_data.drr_info.drr_in_use);
265 5 : KUNIT_EXPECT_EQ(test, test_param->drr_window_size_ms,
266 : pipe_data->pipe_config.vblank_data.drr_info.drr_window_size_ms);
267 5 : KUNIT_EXPECT_EQ(test, test_param->use_ramping,
268 : pipe_data->pipe_config.vblank_data.drr_info.use_ramping);
269 5 : KUNIT_EXPECT_EQ(test, test_param->min_vtotal_supported,
270 : pipe_data->pipe_config.vblank_data.drr_info.min_vtotal_supported);
271 5 : KUNIT_EXPECT_EQ(test, test_param->max_vtotal_supported,
272 : pipe_data->pipe_config.vblank_data.drr_info.max_vtotal_supported);
273 5 : }
274 :
275 : static struct kunit_case dc_dmub_srv_cases[] = {
276 : KUNIT_CASE_PARAM(populate_subvp_cmd_drr_info_test, populate_subvp_cmd_drr_info_gen_params),
277 : { }
278 : };
279 :
280 : static struct kunit_suite dc_dmub_srv_suite = {
281 : .name = "dc_dmub_srv",
282 : .test_cases = dc_dmub_srv_cases,
283 : };
284 :
285 : kunit_test_suite(dc_dmub_srv_suite);
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